The invention applies generally to the manufacture and design of circuits that are integrated in the monocrystalline semiconductor substrate of a chip and are produced from MOSFETs (metal oxide semiconductor field effect transistors). The invention advantageously applies to the manufacture and design of large-sized, very large scale integration chips, or VSLI chips, and particularly to the chips that include a programmable read only memory. At present in the manufacture and design of large scale integrated circuits attempts are being made to use the laser widely, to modify the circuits of the chips. Circuit modification is naturally done, when the chip is a programmable read only memory or includes such a memory. Laser programming thus serves to determine the state of conduction of the memory cells. On the other hand, a modification of the circuits of the chip is presently done to correct certain connection defects. Generally, laser programming as a function of the integrated circuits of a chip has numerous applications and numerous advantages.
An integrated circuit is essentially a semiconductor substrate including doped regions for comprising electronic components and having an interconnect structure of these components. The interconnect structure rests on the substrate via a dielectric silicon dioxide (SiO2) layer formed by growth of the material of the substrate. The dielectric layer is generally thin above the doped regions, being on the order of several tens of nanometers, and thick (several nanometers thick) between these regions. The interconnect structure presently comprises a plurality of conductive layers separated by insulating layers and connected to one another at certain points by vias passing through the insulating layers. Each conductive layer comprises numerous conductors parallel to one another in a direction orthogonal to the conductors of a neighboring conductive layer. Conductors of the lower layer are connected with the corresponding regions of the substrate via openings made in the thin dielectric layer covering these regions.
At present, manufacturing very large scale integrated circuits on large sized chips produces only a low percentage of chips that are not defective. Defects may be either in the semiconductor substrate or in the interconnect structure formed on the substrate for connecting the components of the chip. Several methods for correcting defects, to increase the percentage of usable chips, are known. These correction methods involve the reconfiguration of the circuits or redundancy of functional blocks. Reconfiguration comprises modifying the wiring or the function of a defective circuit, while redundancy comprises substituting a homologous block, especially provided for correction, for a defective block.
Reconfiguration and redundancy are done by the intermediary of additional wiring designed to be connected to the defective wiring by a predetermined connection program. More precisely, the design of integrated circuits in a chip provides that the original conductors of certain functional blocks or elements of the chip cooperate with the substitute conductors of the corresponding correction circuit. The original conductors and the substitute conductors may be wires of the interconnect structure or of the doped regions of the substrate. The correction comprises inhibiting the defective functional blocks or elements and connecting their original conductors to corresponding substitute conductors.
Several programming methods, in particular for programmable read only memories or for correcting circuits, are presently in use. However, these methods avoid resorting to control of the conduction of a transistor bonding device for connecting one conductor to another conductor. In fact, the device for polarizing and controlling the bonding transistor or transistors would involve a complex and expensive bonding device of relatively large surface area. Considering the great number of bonds to be provided on one large-sized VLSI chip, the surface area and cost of the set of bonding devices would be prohibitive. Consequently, programming methods tend to make maximum use of bonds that are programmable by laser beam. These bonds are made between two superimposed conductors insulated from one another by an insulating layer. The design of the integrated circuits thus comprises superimposing an original conductor, in particular by growth, and the corresponding substitute conductor for circuit correction, or the two line and column conductors of a programmable read only memory (PROM). However, the conventional connection by laser in the zones of superposition of the two conductors requires that the upper conductor be placed at a level above the interconnect structure. This constraint greatly complicates the wiring and makes the channels provided for the interconnections of the interconnect structure undesirably bulky. This is also true if the defective functional blocks and elements are isolated by laser cutting.